| 内容提要: |
In this report, a CMOS digital pixel sensor (DPS) with pixel-level ADC based on pulse width modulation (PWM) scheme is proposed to overcome the restriction of low supply voltage imposed by device scaling trend. The pixel operates with a dynamic current comparison scheme to avoid using complex in-pixel comparator and achieve a high dynamic range (DR). By adjusting clock frequency for different illumination, DR is further extended due to increasing the maximum detectable photocurrent and lowering the minimum detectable photocurrent. The pixel contains a photodiode (PD), an 11-bit in-pixel SRAM and other 11 transistors, and occupies an area of 7μm×7μm, with a fill factor of 27.3% using a standard 65nm CMOS technology. Simulation results show that this pixel can work at a supply voltage as low as 0.5V with 120dB DR and 80dB linear dynamic range (LDR). The properties of high dynamic range and logarithmic response make the proposed digital pixel be capable of human eye. And frame rate achieves 246 fps with 640×480 pixel array by using in-pixel ADC and DRAM. This makes the digital pixel very suitable for high-speed snap shot digital camera application. |